A Reprint from the EEDJ Of SPfE - The International Society for Optical Engineerins
نویسنده
چکیده
Architectures for focal-plane image processing using CCD circuits are discussed. The choice of architecture depends on imager density and required throughput. High-density imagers require the reconstruction of local neighborhoods prior to image processing. Lower density imagers can utilize spatial parallelism to improve throughput. The use of three-dimensional structures can provide additional real-estate for processing circuitry.
منابع مشابه
EEDJ Of SPlE - The International Society for Optical Engineering
Progress in high-speed GaAs charge-coupled device (CCD) research is described. Experimental and modelling results are reported for two different structures; capacitive gate CCD's and resistive gate CCD's. A charge packet replicator/subtractor circuit is discussed.
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تاریخ انتشار 1989